The disclosed embodiments of the present invention relate to video data processing, and more particularly, to a video processing system using low-cost video encoding/decoding architecture.
One conventional video system design may include a video transmitting system (or a video recording system) and a video receiving system (or a video playback system). Regarding the video transmitting system/video recording system, it may include a video encoder, an audio/video multiplexing circuit, and a transmitting circuit. Regarding the video receiving system/video playback system, it may include a receiving circuit, an audio/video demultiplexing circuit, a video decoder and a display engine. However, the conventional video system design may fail to meet the requirements of some ultra-low latency applications due to long recording latency at the video transmitting system/video recording system and long playback latency at the video receiving system/video playback system. In general, entropy decoding is a performance bottleneck of video decoding, and the performance of entropy decoding is sensitive to bitrate. High bitrate achieves better quality, but results in large latency. In addition, when there are multiple video sources, using one set of a video encoder and a video decoder to serve one of the video sources is not cost-effective.